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Draft: 7.0.y spacewar audio #29

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a93107c
Revert "ASoC: qcom: sm8250: Increase MI2S BCLK rate for 32-bit playback"
f-izzo May 18, 2026
aa36d88
Revert "ASoC: qcom: q6asm-dai: Advertise S32 format to ALSA while sen…
f-izzo May 18, 2026
e7682e8
arm64: dts: qcom: sm7325-nothing-spacewar: add WCD9385 codec
f-izzo Apr 18, 2026
102c363
ASoC: qcom: set min channels = 1 for sm8250 TX dai
f-izzo May 18, 2026
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208 changes: 205 additions & 3 deletions arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>

#include "sm7325.dtsi"
#include "pm7325.dtsi"
Expand Down Expand Up @@ -380,6 +381,36 @@
regulator-always-on;
vin-supply = <&vph_pwr>;
};

wcd9385: audio-codec {
compatible = "qcom,wcd9385-codec";

pinctrl-0 = <&wcd_reset_n>;
pinctrl-1 = <&wcd_reset_n_sleep>;
pinctrl-names = "default", "sleep";

reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>;

vdd-rxtx-supply = <&vdd_txrx>;
vdd-io-supply = <&vdd_px_wcd9385>;
vdd-buck-supply = <&vdd_buck>;
vdd-mic-bias-supply = <&vdd_mic_bias>;

qcom,micbias1-microvolt = <2750000>;
qcom,micbias2-microvolt = <2700000>;
qcom,micbias3-microvolt = <2750000>;
qcom,micbias4-microvolt = <2750000>;

qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
500000 500000 500000>;
qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
qcom,mbhc-headphone-vthreshold-microvolt = <50000>;

qcom,rx-device = <&wcd_rx>;
qcom,tx-device = <&wcd_tx>;

#sound-dai-cells = <1>;
};
};

&apps_rsc {
Expand Down Expand Up @@ -1021,21 +1052,27 @@
clock-frequency = <100000>;
status = "okay";

tfa9873_l: codec@34 { /* EAR */
tfa9873_l: codec@34 { /* Top Speaker */
compatible = "nxp,tfa9873",
"nxp,tfa9872";
reg = <0x34>;
reset-gpio = <&tlmm 101 GPIO_ACTIVE_HIGH>;

sound-channel = <0>;
sound-name-prefix = "Amplifier L";

#sound-dai-cells = <1>;
};

tfa9873_r: codec@35 { /* SPK */
tfa9873_r: codec@35 { /* Bottom Speaker */
compatible = "nxp,tfa9873",
"nxp,tfa9872";
reg = <0x35>;
reset-gpio = <&tlmm 101 GPIO_ACTIVE_HIGH>;

sound-channel = <1>;
sound-name-prefix = "Amplifier R";

#sound-dai-cells = <1>;
};
};
Expand Down Expand Up @@ -1076,6 +1113,61 @@
/delete-property/ power-domains;
};

&lpass_rx_macro {
status = "okay";
};

&lpass_tx_macro {
status = "okay";
};

&lpass_va_macro {
qcom,dmic-sample-rate = <4800000>;
vdd-micb-supply = <&vdd_mic_bias>;
status = "okay";
};

&lpass_rx_macro {
/delete-property/ power-domains;
/delete-property/ power-domain-names;
clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&lpass_va_macro>;
clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";

clock-output-names = "mclk";
};

&lpass_tx_macro {
compatible = "qcom,sm7325-lpass-tx-macro",
"qcom,sm8450-lpass-tx-macro"; // txmacro = v9.2

/delete-property/ power-domains;
/delete-property/ power-domain-names;
clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&lpass_va_macro>;
clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";

clock-output-names = "mclk";

};

&lpass_va_macro {
/delete-property/ power-domains;
/delete-property/ power-domain-names;
clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "mclk", "macro", "dcodec";

clock-output-names = "fsgen";
};

&mdss {
status = "okay";
};
Expand Down Expand Up @@ -1317,12 +1409,28 @@
reg = <PRIMARY_MI2S_RX>;
qcom,sd-lines = <1>;
};

dai@113 {
reg = <RX_CODEC_DMA_RX_0>;
};

dai@120 {
reg = <TX_CODEC_DMA_TX_3>;
};
};

&q6asmdai {
dai@0 {
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};

dai@1 {
reg = <1>;
};

dai@2 {
reg = <2>;
};
};

&qfprom {
Expand Down Expand Up @@ -1379,6 +1487,17 @@
pinctrl-names = "default",
"sleep";

audio-routing = "IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"AMIC1", "MIC BIAS1",
"AMIC2", "MIC BIAS2",
"AMIC4", "MIC BIAS1",
"AMIC5", "MIC BIAS4",
"TX SWR_INPUT0", "ADC1_OUTPUT",
"TX SWR_INPUT1", "ADC2_OUTPUT",
"TX SWR_INPUT4", "ADC3_OUTPUT",
"TX SWR_INPUT5", "ADC4_OUTPUT";

mm1-dai-link {
link-name = "MultiMedia1";

Expand All @@ -1387,19 +1506,67 @@
};
};

mm2-dai-link {
link-name = "MultiMedia2";

cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
};

mm3-dai-link {
link-name = "MultiMedia3";

cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};

i2s-dai-link {
link-name = "I2S Playback";

cpu {
sound-dai = <&q6afedai PRIMARY_MI2S_RX>;
};

codec {
sound-dai = <&tfa9873_l 0>, <&tfa9873_r 0>;
};

platform {
sound-dai = <&q6routing>;
};
};

wcd-playback-dai-link {
link-name = "WCD Playback";

cpu {
sound-dai = <&q6afedai RX_CODEC_DMA_RX_0>;
};

codec {
sound-dai = <&tfa9873_l 0>, <&tfa9873_r 0>;
sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
};

platform {
sound-dai = <&q6routing>;
};
};

wcd-capture-dai-link {
link-name = "WCD Capture";

cpu {
sound-dai = <&q6afedai TX_CODEC_DMA_TX_3>;
};

codec {
sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
};

platform {
sound-dai = <&q6routing>;
};
};
};
Expand Down Expand Up @@ -1440,6 +1607,28 @@
};
};

&swr0 {
status = "okay";

wcd_rx: codec@0,4 {
compatible = "sdw20217010d00";
reg = <0 4>;

qcom,rx-port-mapping = <1 2 3 4 5>;
};
};

&swr1 {
status = "okay";

wcd_tx: codec@0,3 {
compatible = "sdw20217010d00";
reg = <0 3>;

qcom,tx-port-mapping = <1 2 3 4>;
};
};

&tlmm {
/* 56-59: Fingerprint reader (SPI) */
gpio-reserved-ranges = <56 4>;
Expand Down Expand Up @@ -1524,6 +1713,19 @@
bias-pull-down;
};

wcd_reset_n: wcd-reset-n-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
};

wcd_reset_n_sleep: wcd-reset-n-sleep-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
bias-disable;
};

hst_bt_en: hst-bt-en-state {
pins = "gpio85";
function = "gpio";
Expand Down
7 changes: 3 additions & 4 deletions sound/soc/qcom/qdsp6/q6asm-dai.c
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Original file line number Diff line number Diff line change
Expand Up @@ -113,8 +113,7 @@ static const struct snd_pcm_hardware q6asm_dai_hardware_playback = {
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
.formats = (SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_LE |
SNDRV_PCM_FMTBIT_S32_LE),
SNDRV_PCM_FMTBIT_S24_LE),
.rates = SNDRV_PCM_RATE_8000_192000,
.rate_min = 8000,
.rate_max = 192000,
Expand All @@ -139,7 +138,8 @@ static const struct snd_pcm_hardware q6asm_dai_hardware_playback = {
SNDRV_PCM_RATE_96000 | \
SNDRV_PCM_RATE_176400 | \
SNDRV_PCM_RATE_192000), \
.formats = (SNDRV_PCM_FMTBIT_S32_LE), \
.formats = (SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S24_LE), \
.channels_min = 1, \
.channels_max = 8, \
.rate_min = 8000, \
Expand Down Expand Up @@ -501,7 +501,6 @@ static int q6asm_dai_hw_params(struct snd_soc_component *component,
case SNDRV_PCM_FORMAT_S16_LE:
prtd->bits_per_sample = 16;
break;
case SNDRV_PCM_FORMAT_S32_LE:
case SNDRV_PCM_FORMAT_S24_LE:
prtd->bits_per_sample = 24;
break;
Expand Down
2 changes: 0 additions & 2 deletions sound/soc/qcom/qdsp6/q6routing.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1083,8 +1083,6 @@ static int routing_hw_params(struct snd_soc_component *component,
case SNDRV_PCM_FORMAT_S24_LE:
session->bits_per_sample = 24;
break;
case SNDRV_PCM_FORMAT_S32_LE:
session->bits_per_sample = 24;
default:
break;
}
Expand Down
14 changes: 12 additions & 2 deletions sound/soc/qcom/sm8250.c
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Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,7 @@
#include "usb_offload_utils.h"
#include "sdw.h"

/* 48000 kHz * 32 bits/sample * 2 channels */
#define MI2S_BCLK_RATE 3072000
#define MI2S_BCLK_RATE 1536000

struct sm8250_snd_data {
bool stream_prepared[AFE_PORT_MAX];
Expand Down Expand Up @@ -58,13 +57,24 @@ static void sm8250_snd_exit(struct snd_soc_pcm_runtime *rtd)
static int sm8250_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
struct snd_interval *rate = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_RATE);
struct snd_interval *channels = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);

rate->min = rate->max = 48000;
channels->min = channels->max = 2;
switch (cpu_dai->id) {
case TX_CODEC_DMA_TX_0:
case TX_CODEC_DMA_TX_1:
case TX_CODEC_DMA_TX_2:
case TX_CODEC_DMA_TX_3:
channels->min = 1;
break;
default:
break;
}

return 0;
}
Expand Down