[chip,dv] Define sw_logger_if::wait_for_log_message

[rswarbrick]

This was triggered by warning messages when building chip-level testbenches. The motivating example is the uses in chip_sw_keymgr_dpe_key_derivation_vseq.

The existing code had lines like the following:

    `DV_WAIT(cfg.sw_logger_vif.printed_log ==
        $sformatf("KeymgrDpe generated AES output from DPE context in slot %0d", derived_key_slot_idx))

This generates warnings because printed_log is a bit vector of some length (1024 characters), so the EDA tool suggests the comparisons should be cast, giving something like this:

    `DV_WAIT(string'(cfg.sw_logger_vif.printed_log) ==
        $sformatf("KeymgrDpe generated AES output from DPE context in slot %0d", derived_key_slot_idx))

This is rather ugly, and ends up with users having to reason about the implementation of the interface. With the new version of the code, this can be simplified to

    cfg.sw_logger_vif.wait_for_log_message(
      $sformatf("KeymgrDpe generated AES output from DPE context in slot %0d", derived_key_slot_idx))

The wait_for_log_message task has a default timeout, which I've actually copied manually from csr_utils_pkg: it doesn't feel like sw_logger_if should depend on that core.

It also has the option of describing the thing that's being waited for, which lets the caller be a bit more specific about what should be in an error message.

The change described above squashes some warnings, which is nice, but the code is still rather hard to read (a long string literal and a call to $sformatf). To improve things, this commit pulls some of that repeated code into some helper tasks in the virtual sequence, so this eventually becomes:

    wait_for_keymgr_dpe_gen_output_slot_msg("AES", derived_key_slot_idx);