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replace std::unordered_set with std::vector for pixel history-cost dedup Signed-off-by: Augusto Berndt <augusto.berndt@precisioninno.com>
…ition Replace the hand-rolled minmax/containment check with odb::Rect::intersects(Point), which has the same inclusive-boundary semantics. Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
findInstNetsMatching had two branches: glob went through netIterator (scoped, correct), exact went through findNet. For a non-top instance, findNet falls back to a flat block lookup of pathName(instance)+"/"+name, so get_nets -hierarchical <name> could return a top-scope net like u1/foo while visiting leaf instance u1, even though u1 has no local net foo. Collapse to the scoped iterator for both cases. PatternMatch::match does an exact compare when there are no wildcards, so the branch was redundant and the source of the false match. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
isConnected decremented the group counter for every intersecting segment pair, even when both segments already shared the same union-find root. Cycles in the segment connectivity graph (multi-fanout junctions) therefore over-decremented the counter, masking genuinely disconnected segments elsewhere in the net. Decrement only when uniteGroups merges two distinct groups. Add read_segments_error6 test: the read_segments1.segs clock route plus one isolated segment, which previously passed validation silently and now fails with GRT-0262. Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
…ROAD into grt_merge_nets
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
…_nets grt: fix layer stack when merging nets
Signed-off-by: Arthur Koucher <arthurkoucher@precisioninno.com>
Signed-off-by: Arthur Koucher <arthurkoucher@precisioninno.com>
cmake: fix a redundant flag causing the build to fail with newer GCC versions
syn: Add gate remapping by Ashenhurst-Curtis decomposition with shared set
…rhold Fix dependencies for //src/rsz/test:TestRepairHoldRollback
dbSta: make get_nets glob patterns find hierarchical nets
…-macro-edgetype-numeric odb: accept numeric edge type names in macro LEF58_EDGETYPE parser
By running the build-cleaner: ``` source <(etc/run-build-cleaner.sh //src/syn/test:acd_test) ``` Signed-off-by: Henner Zeller <h.zeller@acm.org>
Fix dependencies in `:acd_test`
Signed-off-by: Augusto Berndt <augusto.berndt@precisioninno.com>
…ove_banking MBFF clock-tree power credit - promote higher banking ratios
…-pattern Fix moire pattern
est: add multi-tech wire RC support
…g-threshold syn: Add option to keep names based on fanout
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Both paths rendered a flat 256 px tile whatever the display was doing, so on a HiDPI screen they were upscaled and soft over layer tiles that are now crisp, and their highlights sat fractionally off the shapes they annotate. They take the same sizing contract as layer tiles: the client states the exact device-pixel square the tile will occupy (`tile_px`), and the ratio scales what is authored in CSS px. 0 falls back to 256*dpr, so a client that names no count is unaffected. Pixel-authored sizes follow the display too, via a px_per_css on TileFrame: heat-map bin labels (14 CSS px) and overlay pen widths (3 CSS px) were fixed counts of physical pixels, so they shrank to a third of their intended size on a 3x display. Layer-tile overlays pick this up as well, since they share the helpers. Tested across the same ratio matrix as the layer path: exact pixel counts, registration against the layer tile grid, the fallback path, clamping at the request handler, label scaling (which fails if the font height stops following the ratio), and that both client layers actually put the fields on the wire -- a helper that is never called is the failure mode the layer path already had. Signed-off-by: Peter Gadfort <gadfort@zeroasic.com> Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
rcx: handle track grids with tracks in only one direction
CI: - Security scan: renamed the `arm` helper in watchDevicePixelRatio, which is a blocked word. It is now `listen`, and the comments describing it no longer use the term either. - Clang-format: the CI runs 18.1.3, which formats pointer-to-member declarations differently from newer releases (`::*field`, not `::* field`). The one line affected predates this branch; it fails the check only because touching the file brings it under review. Every changed C++ file has been formatted with 18.1.3 rather than a local version, which also caught two stream-operator breaks in the tests that a newer clang-format left alone. Review: - quantizeTilePx clamped the value AFTER rounding it, so a client sending a double past the range of long long reached std::llround with it — undefined behaviour. Clamped first, in double. - watchDevicePixelRatio's unsubscribe left the pending listener attached. The `once` option retires a handler that has fired; the one still waiting on the current ratio has not, and outlived the caller. Removed explicitly, and the fake in the test now records removals so this is asserted rather than assumed. - snapContainerToDeviceGrid takes the real measurement by default instead of requiring every caller to inject one. Also refreshed a stale comment in device-pixels.js: it still described the tile size as 256 and called a fractional pitch an out-of-reach residual, which the device-exact tile size fixed. Signed-off-by: Peter Gadfort <gadfort@zeroasic.com> Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
…evel_creation_infint_loop
docs: add DSE and autotuner support guidelines for zero-config futility guards
GCC builds with -Werror=unused-variable; the clang build CI runs first does not, so this only surfaced on the Jenkins job. The expected coverage is now derived from the bin size and the design bounds rather than hardcoded as a third of the tile, which uses the bounds the test had already fetched and states where the number comes from. Signed-off-by: Peter Gadfort <gadfort@zeroasic.com> Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
web: Fix tile seams and HiDPI rendering in the web viewer
Optimize EstimateParasitics::layerRC to query layer resistance and capacitance via layer-number-indexed vectors rather than std::unordered_map lookups per layer on every wire segment during parasitics estimation. Use assert(layer != nullptr) in setLayerRC and layerRC. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
odb, est: optimize layer lookups in dbTech and EstimateParasitics
Signed-off-by: Arthur Koucher <arthurkoucher@precisioninno.com>
dbSta: add SWIG interface to allow dbNet -> sta::Net conversion
Signed-off-by: Naveen Venkat <archgen.guest@nyayanidhi.in>
Adds the four display-control overlays of parity table 2.5 to the web viewer — access-point markers, dbRegion boundaries, the manufacturing grid and the GCell grid — plus the Misc toggles that go with them: "Flywires only", "Focused nets guides" and "Highlight selected". Each overlay is a self-painting pseudo layer registered in one table (PseudoLayerDef), which is the single source of truth for the tile dispatch, the pseudo-layer guard and the order saveImage composites them in. That order mirrors the zIndex the client gives each layer, so a saved PNG is the view on screen; compositing in registry order instead put the manufacturing grid over the routing and the pin markers over the tech layers. Two overlays needed a deliberate deviation from Qt. The manufacturing grid is decimated adaptively rather than hidden below the legibility limit: a 10 DBU grid on a 9.3 mm die only clears a 5 px spacing at z=15, so Qt's rule makes the overlay unreachable in practice. Access points are culled by the marker's extent rather than its centre, because the X reaches half a marker past the point and a centre-based cull chopped it along every tile seam. "Flywires only" suppresses the routed wire and guide shapes but keeps the terminal pin boxes and the special (geometric) routing, matching what the GUI draws in that mode — without the SWires a selected supply net came back with no highlight at all. The flywire fan is capped at 4096 lines: the GUI draws straight to the screen, but here the driver x sink product is materialized in the session and copied per overlay tile. Oblique segments convert to pixels in double and are clipped by drawLine rather than going through the clamped integer conversion, whose per-axis saturation rotates a segment instead of shortening it once one axis overflows. Includes the review feedback from PR #10806: highlights are re-derived from the selection they came from so a "Flywires only" flip cannot drop a multi-selection, the per-block overlay caches are invalidated on a design change and hand out shared ownership instead of a reference that outlives its lock, and the supersampled render path is honored throughout. Signed-off-by: Jorge Ferreira <jorge.ferreira@precisioninno.com>
…ebGUI-display-controls-overlays-grids-misc1 web: add display-control overlays from parity table 2.5 (#10619)
clang-format fix typo fix Signed-off-by: Jeff Ng <jeffng@precisioninno.com>
…ge-2 added layer name to min pitch message - take 2
…C by tech Rename isIdealClockPin/isIdealClockNet to isSkipPin/isSkipNet and broaden the skip criterion used during incremental parasitic updates. A net is skipped when its driver pin carries no parasitic-dependent timing: it is an ideal clock, or it is constant or has a disabled timing constraint. The reasons are evaluated per mode and combined, so a pin that is constant in one mode and disabled in another is still skipped, while the ideal-clock reason keeps its cross-mode semantics (a clock in at least one mode and ideal in every mode where it is a clock, ignoring non-clock modes). Skipping avoids both wire RC re-estimation and delaysInvalidFromFanin() for these nets. Convert the estimateWireParasiticSteiner guard to an early return and key wire RC by technology so multi-tech designs resolve per-tech values with a default fallback. Add unit tests exercising the skip logic through the public parasitics API: ideal-clock and scan-clock (via arrival validity), and constant, disabled, and mixed constant/disabled nets (via reduced pi-Elmore presence), plus per-tech wire RC resolution. Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
…irrelevant-nets-per-tech-rc est: skip parasitic estimation for timing-irrelevant nets
The pull request lock file check compared MODULE.bazel against itself instead of MODULE.bazel.lock, so it has been blind since it was rewritten in #10690. Compare MODULE.bazel.lock, and emit a GitHub error annotation with the exact regeneration command so the diff is actionable. Regenerate MODULE.bazel.lock, which drifted once the rules_python pip extension was invalidated and re-queried pypi.org/simple, adding dist_hashes facts for markdown-it-py, pygments, rich and setuptools. Drop the lock file update from the master push auto-format job: master is protected, so its push is rejected with GH006 whenever the job produces a diff, which is why every master push has been red since 2026-08-04. Signed-off-by: Joao Luis Sombrio <sombrio@sombrasoft.dev>
design_powergrid__drop__average carried results.avg_voltage, so on a power net it reported the supply voltage rather than the drop. avg_ir_drop was already computed and used in the text report, but never reached the metric. The mistake was invisible on a ground net, where net_voltage is 0 and getSolution() sets avg_ir_drop = avg_voltage, so half of every run looked correct. On a 1.8 V power net the metric read 1.79999 where the average drop was 6.41e-06. Also adds design_powergrid__voltage__average, so the value that metric used to carry is still available and is named for what it is, alongside the existing design_powergrid__voltage__worst. Fixes #11096 Signed-off-by: Shivaram Mysore <shivaram.mysore@gmail.com>
…k-check-fix ci: fix MODULE.bazel.lock gate and regenerate the lock file
Signed-off-by: Peter Gadfort <gadfort@zeroasic.com>
psm: report the average IR drop under the drop__average metric
ord: register Tech for Python global APIs
odb: ensure chip has a name and not a nullptr
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