Add a property-configured HNSW codec

[nvzm123]

Part of #2619.

Depends on #2626 and #2628; this draft should merge after both prerequisites.

Adds a public no-argument Lucene101ConfiguredHNSWCodec to the standard thin JAR. It reads namespaced JVM properties for maxConn and beamWidth, validates them against the existing parameter bounds, snapshots them per construction, and preserves the existing codec and vector-format identities.

The adapter is loaded explicitly by class name and is intentionally not a Lucene SPI provider. Unit tests cover validation, boundaries, repeated construction, snapshots, and identity. A fresh-JVM Java integration test loads the exact packaged thin JAR through Class.newInstance() and verifies SPI exclusion; it does not execute PyLucene/JCC.

The API generator now follows project-local superclass chains so indirect codec subclasses remain grouped under “Codecs and Formats.”

Automated stock-PyLucene coverage remains to be added in a cuVS Bench follow-up stacked on #2624 and this PR; #2619 remains open for that work. A manual Python 3.14.6 / PyLucene 10.2.0 JCC-surface probe against target/cuvs-lucene-26.12.0.jar (SHA-256 eb3b0a768100d37e196e37f99ae5ea750fb6bf274be228691e112f79fefe113f) constructed and cast the codec twice and propagated the missing-property error successfully.

Testing

• mvn spotless:check verify (334 passed, 30 skipped; 4/4 Failsafe integration tests passed)
• configured-codec unit tests (9/9 passed)
• documentation generation repeated twice with identical output hashes
• manual stock-PyLucene 10.2.0/JCC probe described above (passed)

The first full run failed TestCuVSGaps.testVectorSearchWithFilterAndAlternatingDocuments at seed 4E24026F4DCCD337. The same focused test and seed failed identically on clean origin/main at 102f099a; a subsequent full run passed. This is reported as a pre-existing, seed-specific randomized failure, not as an adapter regression or a previously documented known failure.

[copy-pr-bot]

This pull request requires additional validation before any workflows can run on NVIDIA's runners.

Pull request vetters can view their responsibilities here.

Contributors can view more details about this message here.