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  • Institute of Computing Technology, Chinese Academy of Sciences (ICT, CAS)
  • Beijing, China
  • 07:24 (UTC +08:00)
  • LinkedIn in/zijian-jiang-896765393

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  1. hpdcache-uvm hpdcache-uvm Public

    UVM verification environment for OpenHW Core-V HPDcache

    SystemVerilog 3

  2. cv-hpdcache cv-hpdcache Public

    Forked from openhwfoundation/cv-hpdcache

    RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores

    SystemVerilog

  3. core-v-verif core-v-verif Public

    Forked from openhwfoundation/core-v-verif

    Functional verification project for the CORE-V family of RISC-V cores.

    Assembly