|
35 | 35 |
|
36 | 36 | typedef enum |
37 | 37 | { |
38 | | - SPI_CMD_HD_WRBUF = 0x01, /*!< Half-duplex write of the WRBUF */ |
39 | | - SPI_CMD_HD_RDBUF = 0x02, /*!< Half-duplex read of the RDBUF */ |
40 | | - SPI_CMD_HD_WRDMA = 0x03, /*!< Half-duplex write through DMA */ |
41 | | - SPI_CMD_HD_RDDMA = 0x04, /*!< Half-duplex read through DMA */ |
| 38 | + SPI_CMD_HD_WRBUF = 0x01, /*!< Half-duplex write of the WRBUF */ |
| 39 | + SPI_CMD_HD_RDBUF = 0x02, /*!< Half-duplex read of the RDBUF */ |
| 40 | + SPI_CMD_HD_WRDMA = 0x03, /*!< Half-duplex write through DMA */ |
| 41 | + SPI_CMD_HD_RDDMA = 0x04, /*!< Half-duplex read through DMA */ |
42 | 42 | SPI_CMD_HD_SEG_END = 0x05, /*!< End of a half-duplex segment */ |
43 | | - SPI_CMD_HD_EN_QPI = 0x06, /*!< Enter QPI mode */ |
44 | | - SPI_CMD_HD_WR_END = 0x07, /*!< End of a half-duplex write */ |
45 | | - SPI_CMD_HD_INT0 = 0x08, /*!< Internal operation 0 */ |
46 | | - SPI_CMD_HD_INT1 = 0x09, /*!< Internal operation 1 */ |
47 | | - SPI_CMD_HD_INT2 = 0x0A, /*!< Internal operation 2 */ |
| 43 | + SPI_CMD_HD_EN_QPI = 0x06, /*!< Enter QPI mode */ |
| 44 | + SPI_CMD_HD_WR_END = 0x07, /*!< End of a half-duplex write */ |
| 45 | + SPI_CMD_HD_INT0 = 0x08, /*!< Internal operation 0 */ |
| 46 | + SPI_CMD_HD_INT1 = 0x09, /*!< Internal operation 1 */ |
| 47 | + SPI_CMD_HD_INT2 = 0x0A, /*!< Internal operation 2 */ |
48 | 48 | } spi_command_t; |
49 | 49 | #endif /* SOC_ESP32_C6 */ |
50 | 50 |
|
@@ -104,19 +104,14 @@ static struct rt_spi_ops esp32_spi_ops = |
104 | 104 | .xfer = spixfer, |
105 | 105 | }; |
106 | 106 |
|
107 | | -/** |
108 | | -* @brief SPI Initialization |
109 | | -* @param esp32_spi: SPI BUS |
110 | | -* @retval None |
111 | | -*/ |
112 | | -static void esp32_spi_init(struct esp32_spi *esp32_spi) |
113 | | -{ |
114 | | - spi_configure(NULL,NULL); |
115 | | -} |
116 | | - |
117 | 107 | static rt_err_t spi_configure(struct rt_spi_device* device, |
118 | 108 | struct rt_spi_configuration* configuration) |
119 | 109 | { |
| 110 | + if (configuration == NULL) |
| 111 | + { |
| 112 | + return -RT_EINVAL; |
| 113 | + } |
| 114 | + |
120 | 115 | static spi_bus_config_t buscfg = |
121 | 116 | { |
122 | 117 | .miso_io_num=SPI2_IOMUX_PIN_NUM_MISO, /*MISO*/ |
|
0 commit comments