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[bsp][esp32-c6] drop the null SPI configure call
cppcheck follows spi_configure(NULL, NULL) into a dereference. clang-format also wants the macro backslashes left-aligned and a single space around the enum equals.
1 parent 209d52a commit 6ba29f6

2 files changed

Lines changed: 19 additions & 24 deletions

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‎bsp/ESP/ESP32_C6/idf_port/include/spi_ll_master_start_compat.h‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -19,11 +19,11 @@
1919
* so no other translation unit sees the name. packages/ is not in the
2020
* repository, which is why the fix lives here.
2121
*/
22-
#define spi_ll_master_user_start(hw) \
23-
do \
24-
{ \
25-
spi_ll_apply_config(hw); \
26-
spi_ll_user_start(hw); \
22+
#define spi_ll_master_user_start(hw) \
23+
do \
24+
{ \
25+
spi_ll_apply_config(hw); \
26+
spi_ll_user_start(hw); \
2727
} while (0)
2828

2929
#endif /* RT_ESP_IDF_PORT_SPI_LL_MASTER_START_COMPAT_H */

‎bsp/ESP/libraries/drivers/drv_spi.c‎

Lines changed: 14 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -35,16 +35,16 @@
3535

3636
typedef enum
3737
{
38-
SPI_CMD_HD_WRBUF = 0x01, /*!< Half-duplex write of the WRBUF */
39-
SPI_CMD_HD_RDBUF = 0x02, /*!< Half-duplex read of the RDBUF */
40-
SPI_CMD_HD_WRDMA = 0x03, /*!< Half-duplex write through DMA */
41-
SPI_CMD_HD_RDDMA = 0x04, /*!< Half-duplex read through DMA */
38+
SPI_CMD_HD_WRBUF = 0x01, /*!< Half-duplex write of the WRBUF */
39+
SPI_CMD_HD_RDBUF = 0x02, /*!< Half-duplex read of the RDBUF */
40+
SPI_CMD_HD_WRDMA = 0x03, /*!< Half-duplex write through DMA */
41+
SPI_CMD_HD_RDDMA = 0x04, /*!< Half-duplex read through DMA */
4242
SPI_CMD_HD_SEG_END = 0x05, /*!< End of a half-duplex segment */
43-
SPI_CMD_HD_EN_QPI = 0x06, /*!< Enter QPI mode */
44-
SPI_CMD_HD_WR_END = 0x07, /*!< End of a half-duplex write */
45-
SPI_CMD_HD_INT0 = 0x08, /*!< Internal operation 0 */
46-
SPI_CMD_HD_INT1 = 0x09, /*!< Internal operation 1 */
47-
SPI_CMD_HD_INT2 = 0x0A, /*!< Internal operation 2 */
43+
SPI_CMD_HD_EN_QPI = 0x06, /*!< Enter QPI mode */
44+
SPI_CMD_HD_WR_END = 0x07, /*!< End of a half-duplex write */
45+
SPI_CMD_HD_INT0 = 0x08, /*!< Internal operation 0 */
46+
SPI_CMD_HD_INT1 = 0x09, /*!< Internal operation 1 */
47+
SPI_CMD_HD_INT2 = 0x0A, /*!< Internal operation 2 */
4848
} spi_command_t;
4949
#endif /* SOC_ESP32_C6 */
5050

@@ -104,19 +104,14 @@ static struct rt_spi_ops esp32_spi_ops =
104104
.xfer = spixfer,
105105
};
106106

107-
/**
108-
* @brief SPI Initialization
109-
* @param esp32_spi: SPI BUS
110-
* @retval None
111-
*/
112-
static void esp32_spi_init(struct esp32_spi *esp32_spi)
113-
{
114-
spi_configure(NULL,NULL);
115-
}
116-
117107
static rt_err_t spi_configure(struct rt_spi_device* device,
118108
struct rt_spi_configuration* configuration)
119109
{
110+
if (configuration == NULL)
111+
{
112+
return -RT_EINVAL;
113+
}
114+
120115
static spi_bus_config_t buscfg =
121116
{
122117
.miso_io_num=SPI2_IOMUX_PIN_NUM_MISO, /*MISO*/

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